Currently available systems
| System Name | System | Installation | CPU | FPGA | Toolflow | Properties | Access Policy |
|---|---|---|---|---|---|---|---|
| convey | Convey HC-1 | 2010 | Xeon 5138 | 4x Xilinx Virtex-5 LX 330 | HDL and existing firmware | CPU and FPGA connected via FSB, cache-coherent NUMA architecture | internal |
| cc-4 | Maxeler MPC-C | 2012 | Xeon X5660 | 4x Xilinx Virtex-6 SX475T | MaxJ data flow language | 4 PCIe boards, MaxRing interconnect | internal |
| gen. x86 server | 2015 | Xeon E5-1260v2 | Xilinx Virtex-7 VX690T | Xilinx OpenCL (SDAccel) | AlphaData PCIe FPGA board (ADM-PCIE-7V3) | internal | |
| gen. x86 server | 2016 | Xeon E5-1260v2 | Intel/Altera Arria 10 GX1150 | Intel/Altera OpenCL | Nallatech 385A FPGA card | internal | |
| power8 | IBM S812L | 2016 | POWER8 10-cores | Xilinx Virtex-7 VX690T | HDL and Xilinx Vivado HLS | AlphaData PCIe FPGA board (ADM-PCIE-7V3) | internal |
| micron | Micron/Pico Workstation | 2016 | Intel i7-5930K | Xilinx Kintex-7 UltrascaleKU115 | Xilinx OpenCL | Pico AC-510 FPGA board with Hybrid-memory cube | internal |
| xcl | XCL FPGA cluster | 2017 | Xeon E5-1630v4 | Xilinx Virtex-7 VX690T + Xilinx Kintex Ultrascale KU115 | Xilinx OpenCL | 8-node cluster with 2 FPGA cards per node (AlphaData ADM-PCIE-7V3 and ADM-PCIE-8K5) | external (see below) |
| harp | Intel Xeon+FPGA cluster | 2017 | Xeon E5-v4 | Intel BDW+FPGA hybrid CPU/FPGA | Intel OpenCL, HDL | 10-node cluster with 1 BDW+FPGA processor per node | external (see below) |
External access to these systems
The availability of these FPGA research systems is marked in the column "availability" in the table above.
- Internal availabilty means that the system is generally only accessible for users at Paderborn University. Access for external users is only granted in the scope of a collaboration project.
- External availability means that the system can be made available for external users. To gain access to these systems, please follow the instructions for applying for computing resources.