Prof. Dr. Christian Plessl

Contact
Biography
Publications
Prof. Dr. Christian Plessl

High-Performance Computing

Head - Professor

Paderborn Center for Parallel Computing (PC2)

Manager - Professor

Paderborn Center for Parallel Computing (PC2) > Vorstand

Chairman - Professor

Paderborn Center for Parallel Computing (PC2) > Beirat

Member - Professor

Sonderforschungsbereich 901

Member - Former - Principal Investigator

Phone:
+49 5251 60-5399
Phone (External):
05251/60-1735
Office:
X1.101
Web:
Visitor:
Mersinweg 5
33100 Paderborn
Prof. Dr. Christian Plessl
Education and Academic Career
Since 2022

Professor (W3)

Department of Computer Science, Paderborn University

2015 - 2022

Professor (W2)

Department of Computer Science, Paderborn University

2011 - 2015

Junior Professor (W1)

Department of Computer Science, Paderborn University

07/2014

Habilitation equivalence

Positive evaluation of Junior Professorship, Paderborn University

2007 - 2011

Postdoc

Dept. of Information Technology and Electrical Engineering, ETH Zürich, Switzerland

10.07.2006

Doctorate

Dept. Information Technology and Electrical Engineering, ETH Zürich, Switzerland. Supervisor: Prof. Dr. Lothar Thiele

1995 - 2001

Degree programme

Diploma Electrical Engineering, ETH Zürich, CH

Awards und Fellowships
2023

Best Paper Award, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

2018

Research Award, Paderborn University, jointly with Prof. Thomas D. Kühne

2015

Significant Paper Award, Int. Conf. Field-Programmable Logic and Applications (FPL)

2014

Best Paper Award, International Conference on Reconfigurable Computing and FPGAs

2012

Best Paper Award, International Conference on Reconfigurable Computing and FPGAs

2009

Research Award, Paderborn University, jointly with Prof. Jens Förstner

2001

SEW-EURODRIVE Student Award for Diploma thesis

Miscellaneous
Since 04/2024

Member of DFG Review Board for Computer Science

Elected member fo the DFG Review Board for Computer Science (Area 4.43-07: Computer Architecture, Embedded and Massively Parallel Systems)

Since 2016

Chairman of the board, Paderborn Center for Parallel Computing

Since 2015

Member of the Paderborn University senate committee for IT services (IMT Kommission)

Since 2011

Reviewer: German Science Foundation (DFG), German Federal Ministry for Education and Research (BMBF), Swiss National Science Foundation (SNF), STW Technology Foundation, NL

2015 - 09/2023

Member of the Faculty Board, Paderborn University

Scientific Engagement
Organisation of Scientific Events
Since 2018

Co-organizer, International Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC)

Since 2004

Member of several technical program committees for international conferences, e.g. SC 2021/22, ISC 2021, FPL 2004-2022, ICFPT 2008-2022, FCCM 2020-2022, H2RC 2018-2022

2021

General Chair, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

Engagement in Scientific Organisations
Since 2021

Board of Directors, National HPC Association (NHR), Germany

Since 04/2024

Member of DFG Review Board for Computer Science

Elected member fo the DFG Review Board for Computer Science (Area 4.43-07: Computer Architecture, Embedded and Massively Parallel Systems)

Since 2022

Professor (W3)

Department of Computer Science, Paderborn University

Education and Academic Career
Since 2021

Board of Directors, National HPC Association (NHR), Germany

Engagement in Scientific Organisations
Since 2018

Co-organizer, International Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC)

Organisation of Scientific Events
Since 2016

Chairman of the board, Paderborn Center for Parallel Computing

Since 2015

Member of the Paderborn University senate committee for IT services (IMT Kommission)

Since 2011

Reviewer: German Science Foundation (DFG), German Federal Ministry for Education and Research (BMBF), Swiss National Science Foundation (SNF), STW Technology Foundation, NL

Since 2004

Member of several technical program committees for international conferences, e.g. SC 2021/22, ISC 2021, FPL 2004-2022, ICFPT 2008-2022, FCCM 2020-2022, H2RC 2018-2022

Organisation of Scientific Events
2015 - 09/2023

Member of the Faculty Board, Paderborn University

2023

Best Paper Award, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

Awards und Fellowships
2015 - 2022

Professor (W2)

Department of Computer Science, Paderborn University

Education and Academic Career
2021

General Chair, International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART)

Organisation of Scientific Events
2018

Research Award, Paderborn University, jointly with Prof. Thomas D. Kühne

Awards und Fellowships
2015

Significant Paper Award, Int. Conf. Field-Programmable Logic and Applications (FPL)

Awards und Fellowships
2011 - 2015

Junior Professor (W1)

Department of Computer Science, Paderborn University

Education and Academic Career
07/2014

Habilitation equivalence

Positive evaluation of Junior Professorship, Paderborn University

Education and Academic Career
2014

Best Paper Award, International Conference on Reconfigurable Computing and FPGAs

Awards und Fellowships
2012

Best Paper Award, International Conference on Reconfigurable Computing and FPGAs

Awards und Fellowships
2007 - 2011

Postdoc

Dept. of Information Technology and Electrical Engineering, ETH Zürich, Switzerland

Education and Academic Career
2009

Research Award, Paderborn University, jointly with Prof. Jens Förstner

Awards und Fellowships
10.07.2006

Doctorate

Dept. Information Technology and Electrical Engineering, ETH Zürich, Switzerland. Supervisor: Prof. Dr. Lothar Thiele

Education and Academic Career
2001

SEW-EURODRIVE Student Award for Diploma thesis

Awards und Fellowships
1995 - 2001

Degree programme

Diploma Electrical Engineering, ETH Zürich, CH

Education and Academic Career

Publications

Latest Publications

Scalable quantum detector tomography by high-performance computing

T. Schapeler, R. Schade, M. Lass, C. Plessl, T. Bartley, Quantum Science and Technology 10 (2025).


Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL

M. Meyer, T. Kenter, L. Petrica, K. O’Brien, M. Blott, C. Plessl, ArXiv:2403.18374 (2024).



Noctua 2 Supercomputer

C. Bauer, T. Kenter, M. Lass, L. Mazur, M. Meyer, H. Nitsche, H. Riebler, R. Schade, M. Schwarz, N. Winnwa, A. Wiens, X. Wu, C. Plessl, J. Simon, Journal of Large-Scale Research Facilities 9 (2024).


Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL

M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, V. Aizinger, in: Proceedings of the Platform for Advanced Scientific Computing Conference (PASC), ACM, 2024.


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