Marius Meyer

Contact
Publications
 Marius Meyer

Paderborn Center for Parallel Computing (PC2)

Member - Research Associate - Research Associate

High-Performance Computing

Member - Research Student

Phone:
+49 5251 60-1718
Fax (External):
+49 5251 60-1714
Office:
X1.119
Visitor:
Mersinweg 5
33100 Paderborn

Publications

Latest Publications

Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL
M. Meyer, T. Kenter, L. Petrica, K. O’Brien, M. Blott, C. Plessl, ArXiv:2403.18374 (2024).
Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks
M. Meyer, T. Kenter, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (2023).
Compute Centers I: Heterogeneous Execution Environments
T. Hansmeier, T. Kenter, M. Meyer, H. Riebler, M. Platzner, C. Plessl, in: C.-J. Haake, F. Meyer auf der Heide, M. Platzner, H. Wachsmuth, H. Wehrheim (Eds.), On-The-Fly Computing -- Individualized IT-Services in Dynamic Markets, Heinz Nixdorf Institut, Universität Paderborn, Paderborn, 2023, pp. 165–182.
Towards Performance Characterization of FPGAs in Context of HPC using OpenCL Benchmarks
M. Meyer, in: Proceedings of the 11th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2021.
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