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Data Center Building O Show image information

Data Center Building O

Currently available systems

Custom Computing Systems with FPGAs at PC²
System NameSystemInstallationCPUFPGAToolflowPropertiesAccess
conveyConvey HC-12010Xeon 51384x Xilinx Virtex-5 LX 330HDL and existing firmwareCPU and FPGA connected via FSB, cache-coherent NUMA architectureinternal
cc-4Maxeler MPC-C2012Xeon X56604x Xilinx Virtex-6 SX475TMaxJ data flow language4 PCIe boards, MaxRing interconnectinternal
gen. x86 server2015Xeon E5-1260v2Xilinx Virtex-7 VX690TXilinx OpenCL (SDAccel)AlphaData PCIe FPGA board (ADM-PCIE-7V3)internal
gen. x86 server2016Xeon E5-1260v2Intel/Altera Arria 10 GX1150Intel/Altera OpenCLNallatech 385A FPGA cardinternal
power8IBM S812L2016POWER8 10-coresXilinx Virtex-7 VX690THDL and Xilinx Vivado HLSAlphaData PCIe FPGA board (ADM-PCIE-7V3)internal
micronMicron/Pico Workstation2016Intel i7-5930KXilinx Kintex-7 UltrascaleKU115Xilinx OpenCLPico AC-510 FPGA board with Hybrid-memory cubeinternal
xclXCL FPGA cluster2017Xeon E5-1630v4Xilinx Virtex-7 VX690T + Xilinx Kintex Ultrascale KU115Xilinx OpenCL8-node cluster with 2 FPGA cards per node (AlphaData ADM-PCIE-7V3 and ADM-PCIE-8K5)external (see below)
harpIntel Xeon+FPGA cluster2017Xeon E5-v4Intel BDW+FPGA hybrid CPU/FPGAIntel OpenCL, HDL10-node cluster with 1 BDW+FPGA processor per node
external (see below)

External access to these systems

The availability of these FPGA research systems is marked in the column "availability" in the table above.

  • Internal availabilty means that the system is generally only accessible for users at Paderborn University. Access for external users is only granted in the scope of a collaboration project.
  • External availability means that the system can be made available for external users. To gain access to these systems, please follow the instructions for applying for computing resources.


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