Coherently Attached Programmable Near-Memory Acceleration Platform and its Application to Stencil Processing


Jan van Lunteren, IBM Research Zurich, Switzerland


Application and technology trends are increasingly forcing computer systems to be designed for specific workloads and application domains. Although memory is one of the key components impacting the performance and power consumption of state-of-art computer systems, its operation typically cannot be adapted to workload characteristics beyond some limited controller configuration options. In this paper, we present a novel near-memory acceleration platform based on an Access Processor that enables the main memory system operation to be programmed and adapted dynamically to the accelerated workload. The platform targets both ASIC and FPGA implemen- tations integrated within IBM POWER systems. We show how this platform can be applied to accelerate stencil processing.