Auto­mat­ic Code Re­struc­tur­ing for FP­GAs: Cur­rent Status, Trends and Open Is­sues


João M. P. Cardoso, University of Porto/FEUP, PT


The customization features, large scale parallel computing power, heterogeneity, and hardware reconfigurability of FPGAs make them suitable computing platforms in many application domains, from high-performance to embedded computing. FPGAs are not only able to provide hardware acceleration to algorithms but to also provide complete system solutions with low cost and efficient performance/energy tradeoffs. In recent years we witnessed significant maturity levels in high-level synthesis (HLS) and in FPGA design flows, helping the mapping of computations to FPGAs. However, in order that HLS tools are able to achieve efficient FPGA implementations, applications source code typically needs substantial code restructuring/refactoring. This is neither a simple task for software developers nor for compilers and its automation has become an important line of research. This presentation will start by motivating the investment on source-to-source compilers and then will focus on some of the problems regarding automatic code restructuring. We will focus on the automatic code restructuring improvements over the last years, the trends, the challenges, and on the aspects that make automatic code restructuring an exciting research subject. Finally, we will show our recent and promising approach to automatic code restructuring.