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Data Center Building O Show image information

Data Center Building O

| Marius Meyer

STREAM Benchmark for FPGA Released

We have published an implementation of the well-known STREAM Benchmark for FPGAs. The project contains kernels written in OpenCL and a host code with high resemblance to the original benchmark to measure the global memory bandwidth of an FPGA card as well as the achievable bandwidth between host and device.

The provided code simplifies the compilation of different versions of the host code as well as the kernel to test the behavior of different configurations on a device. We have executed the benchmark compiled with different versions of the Intel FPGA SDK ranging from 17.1 to 19.1 on Noctua, which is equipped with the Bittware 520N cards. The results show noticeable differences among the used compiler versions and are also provided in the project’s repository.

The project is now available on Github.


Marius Meyer

Marius Meyer

Paderborn Center for Parallel Computing (PC2)

Research Associate

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